Author

Ding Li

Date

July 1994

Document Type

Dissertation

Degree Name

Ph.D.

Department

Dept. of Applied Physics

Institution

Oregon Graduate Institute of Science & Technology

Abstract

High frequency (1 GHz - 20 GHz) S-parameter data were collected from a novel circuit configuration of AlGaAs/GaAs HBTs combined as Darlington feedback amplifier for the use of high frequency characterization of such devices, which is believed to be important for understanding of the high current capabilities and improving the integration of multi-stage HBT amplifiers. An analysis using SuperCompact simulation software as a guide led to the formation of a new small-signal two-stage hybrid-π model that precisely simulated the observed S-parameter characteristics. The simulation was accomplished at two different bias conditions. Investigations of these modeled element values have shown some interesting device physics. In particular, (a) the large deviation of second stage collector-base junction capacitance value from the well-known reciprocal square-root C-V relationship at the higher bias implies the influence of some transistor high-injection effects or doping profile modification effect; (b) the unusual reverse-directional change of the second-stage base resistance (increase instead of decrease in the presence of larger emitter area and more fingers) is attributed to the localized heating and current crowding effects, which may result in Kirk effect at relatively low collector current. Moreover, the commonly observed increase of the resistive element values at the higher bias indicated the thermal effect on sheet resistance. The same kind of device but packaged this time was used for high-speed switching analysis, which has been currently less investigated for HBTs. This analysis was based on the TDR (time domain reflectometer) measurements and previous model. A new analysis technique is proposed here specially for small-signal (low-level) switching performance analysis, and characterized by separating the input from output loop, which significantly simplifies the circuit complexity. The hybrid-π model is found to be a good model in completing this task. Several different approaches achieved led to quite consistent results which also match the experimental data and Spice simulation results well. In this investigation, the parasitic load capacitance C[subscript]L is found to be the most sensitive element to affect the speed. The transconductance g[subscript]m (or the current gain ß) and the voltage gain are the main intrinsic parameters contributing to the delay performance. For HBTs, the collector-base junction capacitance appears to be the dominant factor limiting the intrinsic switching speed, specially in the case that a large output-input voltage ratio is expected.

Identifier

doi:10.6083/M4WM1BB3

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