Date

July 1984

Document Type

Thesis

Degree Name

M.S.

Department

Dept. of Computer Science and Engineering

Institution

Oregon Graduate Center

Abstract

The Graph Reduction Machine (G-Machine) is an architecture intended to achieve high performance in executing functional language programs. The success or failure of this novel architecture can only be determined by its performance in executing "real" programs. The simulator of the G-Machine, described in this thesis, makes possible detailed studies of the performance of the G-Machine architecture even though the hardware implementation of a G-Machine is not complete.

Identifier

doi:10.6083/M41N7Z2T

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