Dept. of Computer Science and Engineering
Oregon Graduate Center
The Graph Reduction Machine (G-Machine) is an architecture intended to achieve high performance in executing functional language programs. The success or failure of this novel architecture can only be determined by its performance in executing "real" programs. The simulator of the G-Machine, described in this thesis, makes possible detailed studies of the performance of the G-Machine architecture even though the hardware implementation of a G-Machine is not complete.
Sarangi, Ananda G., "Simulation and performance evaluation of a graph reduction machine architecture" (1984). Scholar Archive. 77.